1. Field of the Invention
The present invention relates to a burst signal reception method and a burst signal reception apparatus and, more particularly, to a burst signal reception method and a burst signal reception apparatus which are suitably applied to a terminal apparatus of a digital radio telephone system which transmits a burst signal which is converted into digital data.
2. Description of the Related Art
As a radio telephone system, there is proposed such one to which applied is a transmission system called a TDMA system (time-division multiple access system) for converting transmission data such as an audio signal or the like into digital data, adding various data such as synchronizing data or the like to the digital data to obtain slot data for each predetermined period of time, and transmitting/receiving the slot data in a time-division manner. In the radio telephone system (e.g., an European GSM system) using this transmission system, radio communication using the above transmission system is performed between base stations arranged at a predetermined interval and terminal apparatuses serving as radio telephone apparatuses to establish a telephone circuit using radio communication. However, when a radio telephone circuit is established by each terminal apparatus, a control channel serving as a predetermined channel is detected to receive data transmitted through the control channel, and the transmission/reception state of the terminal apparatus is set to a state designated by the received data to start communication between the terminal apparatus and the base station.
Here, as the burst signal transmitted from the base station through the control channel, a signal (sine-wave signal having a frequency offset from a carrier frequency by about +67 kHz) having a predetermined pattern called an FCCH (frequency correction channel) is distributed in a predetermined cycle (e.g., cycle of 10 or 11 frames). A process timing is corrected with reference to the FCCH on the terminal apparatus side, and a slot timing at which necessary information is transmitted is roughly detected.
This FCCH is a synchronizing signal to which a bit pattern is allocated such that data of a value of "0" are continued by a predetermined number of bits upon demodulation. In the GSM system, the bit pattern is convolutely coded, then subjected to GMSK modulation (gaussian filtered minimum shift keying modulation) and transmitted. In this manner, as shown in FIG. 9, the FCCH is transmitted by a synthetic wave between an I signal and a Q signal which are offset by a phase of 90.degree. and have signal levels changed in a sine waveform. In the control channel, while this FCCH is transmitted, a carrier frequency is offset by +67.7 kHz.
Therefore, in a terminal apparatus employing this system, when the signal component of the FCCH is extracted from a reception signal by using a bandpass filter, the timing of the FCCH can be detected, and the entire operation can be roughly synchronized with the control channel with reference to the timing detection result.
In the GSM system, a period of time in which the FCCH serving as synchronizing data is transmitted is an extremely short period of term, i.e., about 550 .mu.s, and hence this cannot be easily detected by an ordinary bandpass filter at high precision. Ordinary signal components also include a component which is offset from the carrier frequency by 67.7 kHz to some extent. Therefore, even if extraction is only performed by the bandpass filter, a signal in another period of time may be erroneously detected as an FCCH. In addition, a reception state in such a terminal apparatus may be frequently degraded, and the FCCH may be frequently distorted by noise or fading. From this point of view, it is very difficult to detect the FCCH at high precision.
For this reason, a signal component is not extracted by a bandpass filter to be detected, but the following proposal is made. That is, a reception signal is converted into digital data, and the converted data is checked on the basis of calculation in a digital process system in the terminal apparatus to detect an FCCH. However, a dedicated digital process circuit for detect an FCCH is not preferably arranged because the arrangement of the terminal apparatus becomes complex. Therefore, in a digital process circuit called a DSP (Digital Signal Processor) which is used for a data process in the terminal apparatus, an FCCH detection process may be performed. However, the DSP in which another data process is performed requires a long period of time, and the FCCH cannot be easily detected at real time. Even if the detection process can be performed at real time, a load for detecting the FCCH becomes heavy, and spare time for performing another signal process becomes very small. As a result, an interrupt process for the DSP can be rarely performed.